130 lines
3.9 KiB
C
130 lines
3.9 KiB
C
/**
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******************************************************************
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* @file main.c
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* @author fire
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* @version V1.0
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* @date 2019-xx-xx
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* @brief TIM—通用定时器定时
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******************************************************************
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* @attention
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*
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* 实验平台:野火 STM32H750 开发板
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* 论坛 :http://www.firebbs.cn
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* 淘宝 :http://firestm32.taobao.com
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*
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******************************************************************
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*/
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#include "stm32h7xx.h"
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#include "main.h"
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#include "./usart/bsp_debug_usart.h"
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#include "./tim/bsp_basic_tim.h"
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#include "./led/bsp_led.h"
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#include "./delay/core_delay.h"
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/**
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* @brief 主函数
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* @param 无
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* @retval 无
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*/
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int main(void)
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{
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/* 系统时钟初始化成480MHz */
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SystemClock_Config();
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/* 默认不配置 MPU，若需要更高性能，当配置 MPU 后，使用
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DMA 时需注意 Cache 与 内存内容一致性的问题，
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具体注意事项请参考配套教程的 MPU 配置相关章节 */
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// Board_MPU_Config(0, MPU_Normal_WT, 0xD0000000, MPU_32MB);
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// Board_MPU_Config(1, MPU_Normal_WT, 0x24000000, MPU_512KB);
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SCB_EnableICache(); // 使能指令 Cache
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// SCB_EnableDCache(); // 使能数据 Cache
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/* 初始化LED */
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LED_GPIO_Config();
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/* 初始化基本定时器定时，1s产生一次中断 */
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TIM_Basic_Init();
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while(1)
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{
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}
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}
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/**
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* @brief System Clock 配置
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* system Clock 配置如下:
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* System Clock source = PLL (HSE)
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* SYSCLK(Hz) = 480000000 (CPU Clock)
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* HCLK(Hz) = 240000000 (AXI and AHBs Clock)
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* AHB Prescaler = 2
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* D1 APB3 Prescaler = 2 (APB3 Clock 120MHz)
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* D2 APB1 Prescaler = 2 (APB1 Clock 120MHz)
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* D2 APB2 Prescaler = 2 (APB2 Clock 120MHz)
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* D3 APB4 Prescaler = 2 (APB4 Clock 120MHz)
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* HSE Frequency(Hz) = 25000000
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* PLL_M = 5
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* PLL_N = 192
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* PLL_P = 2
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* PLL_Q = 4
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* PLL_R = 2
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* VDD(V) = 3.3
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* Flash Latency(WS) = 4
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* @param None
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* @retval None
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*/
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/**
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* @brief System Clock Configuration
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* @retval None
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/** 启用电源配置更新
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*/
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/** 配置主内稳压器输出电压
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/** 初始化CPU、AHB和APB总线时钟
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*/
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 192;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLQ = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLFRACN = 0;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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while(1);
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}
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/** 初始化CPU、AHB和APB总线时钟
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*/
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
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|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
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|RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
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{
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while(1);
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}
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}
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/****************************END OF FILE***************************/
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