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STM32H750XB_RT-THREAD/25-FMC—扩展外部NAND/User/main.c

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STM32H750 RTThread 例程
2025-07-21 06:34:29 +00:00
/**
******************************************************************
* @file main.c
* @author fire
* @version V1.0
* @date 2018-xx-xx
* @brief FMC-NAND
******************************************************************
* @attention
*
* ʵ<EFBFBD><EFBFBD>ƽ̨:Ұ<EFBFBD><EFBFBD> STM32 H750 <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* <EFBFBD><EFBFBD>̳ :http://www.firebbs.cn
* <EFBFBD>Ա<EFBFBD> :http://firestm32.taobao.com
*
******************************************************************
*/
#include "stm32h7xx.h"
#include "main.h"
#include "./led/bsp_led.h"
#include "./usart/bsp_usart.h"
#include "./sdram/bsp_sdram.h"
#include "./delay/core_delay.h"
#include "./malloc/malloc.h"
#include "./nand/ftl.h"
#include "./nand/bsp_nand.h"
void SDRAM_Check(void);
uint32_t RadomBuffer[10000];
uint32_t ReadBuffer[10000];
uint32_t *pSDRAM;
long long count=0,sdram_count=0;
RNG_HandleTypeDef hrng;
/**
* @brief <EFBFBD>ӳ<EFBFBD>һ<EFBFBD><EFBFBD>ʱ<EFBFBD><EFBFBD>
* @param <EFBFBD>ӳٵ<EFBFBD>ʱ<EFBFBD>䳤<EFBFBD><EFBFBD>
* @retval None
*/
static void Delay(__IO uint32_t nCount)
{
__IO uint32_t index = 0;
for(index = (100000 * nCount); index != 0; index--)
{
}
}
/**
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* @param <EFBFBD><EFBFBD>
* @retval <EFBFBD><EFBFBD>
*/
int main(void)
{
uint8_t *buf;
uint8_t *backbuf;
/* ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>400MHz */
SystemClock_Config();
LED_GPIO_Config();
/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1Ϊ<31><CEAA>115200 8-N-1 */
UARTx_Config();
printf("\r\n <20><>ӭʹ<D3AD><CAB9>Ұ<EFBFBD><D2B0> STM32 H750 <20><><EFBFBD><EFBFBD><EFBFBD>塣\r\n");
printf("\r\nҰ<EFBFBD><EFBFBD>STM32H750 ˫SDRAM 64MB 32bit<69><74>д<EFBFBD><D0B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n");
/*<2A><>ʼ<EFBFBD><CABC>SDRAMģ<4D><C4A3>*/
SDRAM_Init();
/*<2A><>ʼ<EFBFBD><CABC><EFBFBD>ⲿ<EFBFBD>ڴ<EFBFBD><DAB4><EFBFBD>*/
my_mem_init(SRAMEX);
/*<2A><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʾ<EFBFBD><CABE><EFBFBD>ڶ<EFBFBD>дSDRAM<41><4D><EFBFBD><EFBFBD>*/
LED_BLUE;
while(FTL_Init()) //<2F><><EFBFBD><EFBFBD>NAND FLASH,<2C><><EFBFBD><EFBFBD>ʼ<EFBFBD><CABC>FTL
{
printf("NAND Error!");
Delay(500);
printf("Please Check");
Delay(500);
LED1_TOGGLE;//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD>˸
}
backbuf=mymalloc(SRAMEX,NAND_ECC_SECTOR_SIZE); //<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD>
buf=mymalloc(SRAMIN,NAND_ECC_SECTOR_SIZE); //<2F><><EFBFBD><EFBFBD>һ<EFBFBD><D2BB><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ļ<EFBFBD><C4BB><EFBFBD>
sprintf((char*)buf,"NAND Size:%dMB\n",(nand_dev.block_totalnum/1024)*(nand_dev.page_mainsize/1024)*nand_dev.block_pagenum);
printf((char*)buf); //<2F><>ʾNAND<4E><44><EFBFBD><EFBFBD>
FTL_WriteSectors(backbuf,2,NAND_ECC_SECTOR_SIZE,1);
FTL_ReadSectors(backbuf,2,NAND_ECC_SECTOR_SIZE,1);
test_writepage(9,0,256);
//NAND_EraseBlock(0);
test_readpage(9,0,256);
// /*ѡ<><D1A1>PLL<4C><4C><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ΪRNGʱ<47><CAB1>Դ */
// PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RNG;
// PeriphClkInitStruct.RngClockSelection = RCC_RNGCLKSOURCE_PLL;
// HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
// /*ʹ<><CAB9>RNGʱ<47><CAB1>*/
// __HAL_RCC_RNG_CLK_ENABLE();
// /*<2A><>ʼ<EFBFBD><CABC>RNGģ<47><C4A3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>*/
// hrng.Instance = RNG;
// HAL_RNG_Init(&hrng);
// printf("<22><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>10000<30><30>SDRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n");
// for(count=0;count<10000;count++)
// {
// HAL_RNG_GenerateRandomNumber(&hrng,&RadomBuffer[count]);
// }
// printf("10000<30><30>SDRAM<41><4D><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n");
// SDRAM_Check();
// SDRAM_Test();
while(1)
{
}
}
void SDRAM_Check(void)
{
pSDRAM=(uint32_t*)SDRAM_BANK_ADDR;
count=0;
printf("<EFBFBD><EFBFBD>ʼд<EFBFBD><EFBFBD>SDRAM\r\n");
for(sdram_count=0;sdram_count<SDRAM_SIZE/4;sdram_count++)
{
*pSDRAM=RadomBuffer[count];
count++;
pSDRAM++;
if(count>=10000)
{
count=0;
}
}
printf("д<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD>:%d\r\n",(uint32_t)pSDRAM-SDRAM_BANK_ADDR);
count=0;
pSDRAM=(uint32_t*)SDRAM_BANK_ADDR;
printf("<EFBFBD><EFBFBD>ʼ<EFBFBD><EFBFBD>ȡSDRAM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ԭ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ƚ<EFBFBD>\r\n");
sdram_count=0;
for(;sdram_count<SDRAM_SIZE/4;sdram_count++)
{
if(*pSDRAM != RadomBuffer[count])
{
printf("<EFBFBD><EFBFBD><EFBFBD>ݱȽϴ<EFBFBD><EFBFBD>󡪡<EFBFBD><EFBFBD>˳<EFBFBD>~\r\n");
break;
}
count++;
pSDRAM++;
if(count>=10000)
{
count=0;
}
}
printf("<EFBFBD>Ƚ<EFBFBD>ͨ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֽ<EFBFBD><EFBFBD><EFBFBD>:%d\r\n",(uint32_t)pSDRAM-SDRAM_BANK_ADDR);
if(sdram_count == SDRAM_SIZE/4)
{
LED_GREEN;
printf("SDRAM<EFBFBD><EFBFBD><EFBFBD>Գɹ<EFBFBD>\r\n");
}
else
{
LED_RED;
printf("SDRAM<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʧ<EFBFBD><EFBFBD>\r\n");
}
}
/**
* @brief System Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
* system Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 400000000 (CPU Clock)
* HCLK(Hz) = 200000000 (AXI and AHBs Clock)
* AHB Prescaler = 2
* D1 APB3 Prescaler = 2 (APB3 Clock 100MHz)
* D2 APB1 Prescaler = 2 (APB1 Clock 100MHz)
* D2 APB2 Prescaler = 2 (APB2 Clock 100MHz)
* D3 APB4 Prescaler = 2 (APB4 Clock 100MHz)
* HSE Frequency(Hz) = 25000000
* PLL_M = 5
* PLL_N = 160
* PLL_P = 2
* PLL_Q = 4
* PLL_R = 2
* VDD(V) = 3.3
* Flash Latency(WS) = 4
* @param None
* @retval None
*/
static void SystemClock_Config(void)
{
RCC_ClkInitTypeDef RCC_ClkInitStruct;
RCC_OscInitTypeDef RCC_OscInitStruct;
HAL_StatusTypeDef ret = HAL_OK;
/*ʹ<>ܹ<EFBFBD><DCB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø<EFBFBD><C3B8><EFBFBD> */
MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0);
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳƵ<CDB3><C6B5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ģ<EFBFBD>
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳƵ<EFBFBD>ʵĵ<EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>ĸ<EFBFBD><EFBFBD>¿<EFBFBD><EFBFBD>Բο<EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲᡣ */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
/* <20><><EFBFBD><EFBFBD>HSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>HSE<53><45>ΪԴ<CEAA><D4B4><EFBFBD><EFBFBD>PLL */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLM = 5;
RCC_OscInitStruct.PLL.PLLN = 160;
RCC_OscInitStruct.PLL.PLLP = 2;
RCC_OscInitStruct.PLL.PLLR = 2;
RCC_OscInitStruct.PLL.PLLQ = 2;
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
if(ret != HAL_OK)
{
while(1) { ; }
}
/* ѡ<><D1A1>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5> */
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | \
RCC_CLOCKTYPE_HCLK | \
RCC_CLOCKTYPE_D1PCLK1 | \
RCC_CLOCKTYPE_PCLK1 | \
RCC_CLOCKTYPE_PCLK2 | \
RCC_CLOCKTYPE_D3PCLK1);
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
if(ret != HAL_OK)
{
while(1) { ; }
}
}
/****************************END OF FILE***************************/
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