179 lines
5.6 KiB
C
179 lines
5.6 KiB
C
|
/**
|
|||
|
******************************************************************
|
|||
|
* @file main.c
|
|||
|
* @author fire
|
|||
|
* @version V1.0
|
|||
|
* @date 2018-xx-xx
|
|||
|
* @brief FMC-SDRAM
|
|||
|
******************************************************************
|
|||
|
* @attention
|
|||
|
*
|
|||
|
* ʵ<EFBFBD><EFBFBD>ƽ̨:Ұ<EFBFBD><EFBFBD> STM32H750<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* <EFBFBD><EFBFBD>̳ :http://www.firebbs.cn
|
|||
|
* <EFBFBD>Ա<EFBFBD> :http://firestm32.taobao.com
|
|||
|
*
|
|||
|
******************************************************************
|
|||
|
*/
|
|||
|
#include <stdlib.h>
|
|||
|
#include "stm32h7xx.h"
|
|||
|
#include "main.h"
|
|||
|
#include "./led/bsp_led.h"
|
|||
|
#include "./usart/bsp_usart.h"
|
|||
|
#include "./sdram/bsp_sdram.h"
|
|||
|
#include "./delay/core_delay.h"
|
|||
|
|
|||
|
void SystemClock_Config(void);
|
|||
|
|
|||
|
void Delay(__IO uint32_t nCount);
|
|||
|
|
|||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDRAM
|
|||
|
uint32_t testValue =7 ;
|
|||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDRAM
|
|||
|
uint32_t testValue2 =0;
|
|||
|
|
|||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鵽SDRAM
|
|||
|
uint8_t testGrup[100] ={0};
|
|||
|
//<2F><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>鵽SDRAM
|
|||
|
uint8_t testGrup2[100] ={1,2,3};
|
|||
|
|
|||
|
/**
|
|||
|
* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* @param <EFBFBD><EFBFBD>
|
|||
|
* @retval <EFBFBD><EFBFBD>
|
|||
|
*/
|
|||
|
int main(void)
|
|||
|
{
|
|||
|
uint32_t inerTestValue =10;
|
|||
|
uint32_t * pointer;
|
|||
|
|
|||
|
/* ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>400 MHz */
|
|||
|
SystemClock_Config();
|
|||
|
|
|||
|
/* LED <20>˿ڳ<CBBF>ʼ<EFBFBD><CABC> */
|
|||
|
LED_GPIO_Config();
|
|||
|
|
|||
|
/* <20><>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD><EFBFBD><EFBFBD> */
|
|||
|
UARTx_Config();
|
|||
|
|
|||
|
printf("\r\nSCT<EFBFBD>ļ<EFBFBD>Ӧ<EFBFBD>á<EFBFBD><EFBFBD><EFBFBD><EFBFBD>Զ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>SDRAMʵ<EFBFBD><EFBFBD>\r\n");
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD> uint32_t inerTestValue =10; <20><><EFBFBD><EFBFBD><EFBFBD>䶨<EFBFBD><E4B6A8><EFBFBD>ľֲ<C4BE><D6B2><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n");
|
|||
|
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C><><EFBFBD><EFBFBD>ֵΪ<D6B5><CEAA>%d\r\n",(uint32_t)&inerTestValue,inerTestValue);
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD>uint32_t testValue =7 ;<3B><><EFBFBD><EFBFBD><EFBFBD>䶨<EFBFBD><E4B6A8><EFBFBD><EFBFBD>ȫ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD>\r\n");
|
|||
|
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C><><EFBFBD><EFBFBD>ֵΪ<D6B5><CEAA>%d\r\n",(uint32_t)&testValue,testValue);
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD>uint32_t testValue2 =0 ; <20><><EFBFBD><EFBFBD><EFBFBD>䶨<EFBFBD><E4B6A8><EFBFBD><EFBFBD>ȫ<EFBFBD>ֱ<EFBFBD><D6B1><EFBFBD><EFBFBD><EFBFBD>\r\n");
|
|||
|
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C><><EFBFBD><EFBFBD>ֵΪ<D6B5><CEAA>%d\r\n",(uint32_t)&testValue2,testValue2);
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD>uint8_t testGrup[100] ={0};<3B><><EFBFBD><EFBFBD><EFBFBD>䶨<EFBFBD><E4B6A8><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>飺\r\n");
|
|||
|
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C><><EFBFBD><EFBFBD>ֵΪ<D6B5><CEAA>%d,%d,%d\r\n",(uint32_t)&testGrup,testGrup[0],testGrup[1],testGrup[2]);
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD>uint8_t testGrup2[100] ={1,2,3};<3B><><EFBFBD><EFBFBD><EFBFBD>䶨<EFBFBD><E4B6A8><EFBFBD><EFBFBD>ȫ<EFBFBD><C8AB><EFBFBD><EFBFBD><EFBFBD>飺\r\n");
|
|||
|
printf("<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C><><EFBFBD><EFBFBD>ֵΪ<D6B5><CEAA>%d<><64>%d,%d\r\n",(uint32_t)&testGrup2,testGrup2[0],testGrup2[1],testGrup2[2]);
|
|||
|
|
|||
|
pointer = (uint32_t*)malloc(sizeof(uint32_t)*3);
|
|||
|
if(pointer != NULL)
|
|||
|
{
|
|||
|
*(pointer)=1;
|
|||
|
*(++pointer)=2;
|
|||
|
*(++pointer)=3;
|
|||
|
|
|||
|
printf("\r\nʹ<EFBFBD>á<EFBFBD> uint32_t *pointer = (uint32_t*)malloc(sizeof(uint32_t)*3); <20><><EFBFBD><EFBFBD>̬<EFBFBD><CCAC><EFBFBD><EFBFBD><EFBFBD>ı<EFBFBD><C4B1><EFBFBD>\r\n");
|
|||
|
printf("\r\n<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>IJ<EFBFBD><EFBFBD><EFBFBD>Ϊ<EFBFBD><EFBFBD>\r\n*(pointer++)=1;\r\n*(pointer++)=2;\r\n*pointer=3;");
|
|||
|
printf("\r\n<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ĵ<EFBFBD>ַΪ<EFBFBD><EFBFBD>0x%x,<2C>鿴<EFBFBD><E9BFB4><EFBFBD><EFBFBD>ֵ<EFBFBD><D6B5><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n",(uint32_t)pointer);
|
|||
|
printf("*(pointer--)=%d, \r\n",*(pointer--));
|
|||
|
printf("*(pointer--)=%d, \r\n",*(pointer--));
|
|||
|
printf("*(pointer)=%d, \r\n",*(pointer));
|
|||
|
}
|
|||
|
else
|
|||
|
{
|
|||
|
printf("\r\nʹ<EFBFBD><EFBFBD>malloc<EFBFBD><EFBFBD>̬<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>\r\n");
|
|||
|
}
|
|||
|
/*<2A>̵<EFBFBD><CCB5><EFBFBD>*/
|
|||
|
LED_BLUE;
|
|||
|
while(1);
|
|||
|
}
|
|||
|
|
|||
|
|
|||
|
/**
|
|||
|
* @brief System Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
|
|||
|
* system Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
|
|||
|
* System Clock source = PLL (HSE)
|
|||
|
* SYSCLK(Hz) = 400000000 (CPU Clock)
|
|||
|
* HCLK(Hz) = 200000000 (AXI and AHBs Clock)
|
|||
|
* AHB Prescaler = 2
|
|||
|
* D1 APB3 Prescaler = 2 (APB3 Clock 100MHz)
|
|||
|
* D2 APB1 Prescaler = 2 (APB1 Clock 100MHz)
|
|||
|
* D2 APB2 Prescaler = 2 (APB2 Clock 100MHz)
|
|||
|
* D3 APB4 Prescaler = 2 (APB4 Clock 100MHz)
|
|||
|
* HSE Frequency(Hz) = 25000000
|
|||
|
* PLL_M = 5
|
|||
|
* PLL_N = 160
|
|||
|
* PLL_P = 2
|
|||
|
* PLL_Q = 4
|
|||
|
* PLL_R = 2
|
|||
|
* VDD(V) = 3.3
|
|||
|
* Flash Latency(WS) = 4
|
|||
|
* @param None
|
|||
|
* @retval None
|
|||
|
*/
|
|||
|
void SystemClock_Config(void)
|
|||
|
{
|
|||
|
RCC_ClkInitTypeDef RCC_ClkInitStruct;
|
|||
|
RCC_OscInitTypeDef RCC_OscInitStruct;
|
|||
|
HAL_StatusTypeDef ret = HAL_OK;
|
|||
|
|
|||
|
/*ʹ<>ܹ<EFBFBD><DCB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ø<EFBFBD><C3B8><EFBFBD> */
|
|||
|
MODIFY_REG(PWR->CR3, PWR_CR3_SCUEN, 0);
|
|||
|
|
|||
|
/* <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD><CAB1>Ƶ<EFBFBD>ʵ<EFBFBD><CAB5><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳƵ<CDB3><C6B5>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD>ڿ<EFBFBD><DABF><EFBFBD><EFBFBD>Ż<EFBFBD><C5BB><EFBFBD><EFBFBD>ģ<EFBFBD>
|
|||
|
<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ϵͳƵ<EFBFBD>ʵĵ<EFBFBD>ѹ<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֵ<EFBFBD>ĸ<EFBFBD><EFBFBD>¿<EFBFBD><EFBFBD>Բο<EFBFBD><EFBFBD><EFBFBD>Ʒ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ֲᡣ */
|
|||
|
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
|
|||
|
|
|||
|
while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
|
|||
|
|
|||
|
/* <20><><EFBFBD><EFBFBD>HSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>HSE<53><45>ΪԴ<CEAA><D4B4><EFBFBD><EFBFBD>PLL */
|
|||
|
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
|
|||
|
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
|
|||
|
RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
|
|||
|
RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
|
|||
|
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
|
|||
|
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
|
|||
|
|
|||
|
RCC_OscInitStruct.PLL.PLLM = 5;
|
|||
|
RCC_OscInitStruct.PLL.PLLN = 160;
|
|||
|
RCC_OscInitStruct.PLL.PLLP = 2;
|
|||
|
RCC_OscInitStruct.PLL.PLLR = 2;
|
|||
|
RCC_OscInitStruct.PLL.PLLQ = 2;
|
|||
|
|
|||
|
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
|
|||
|
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
|
|||
|
ret = HAL_RCC_OscConfig(&RCC_OscInitStruct);
|
|||
|
if(ret != HAL_OK)
|
|||
|
{
|
|||
|
while(1) { ; }
|
|||
|
}
|
|||
|
|
|||
|
/* ѡ<><D1A1>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5> */
|
|||
|
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | \
|
|||
|
RCC_CLOCKTYPE_HCLK | \
|
|||
|
RCC_CLOCKTYPE_D1PCLK1 | \
|
|||
|
RCC_CLOCKTYPE_PCLK1 | \
|
|||
|
RCC_CLOCKTYPE_PCLK2 | \
|
|||
|
RCC_CLOCKTYPE_D3PCLK1);
|
|||
|
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
|
|||
|
RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
|
|||
|
RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
|
|||
|
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
|
|||
|
RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
|
|||
|
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
|
|||
|
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
|
|||
|
ret = HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
|
|||
|
if(ret != HAL_OK)
|
|||
|
{
|
|||
|
while(1) { ; }
|
|||
|
}
|
|||
|
}
|
|||
|
/****************************END OF FILE***************************/
|