152 lines
4.6 KiB
C
152 lines
4.6 KiB
C
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/**
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******************************************************************
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* @file main.c
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* @author fire
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* @version V1.0
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* @date 2019-xx-xx
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* @brief ADC-<EFBFBD>ɼ<EFBFBD>
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******************************************************************
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* @attention
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*
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* ʵ<EFBFBD><EFBFBD>ƽ̨:Ұ<EFBFBD><EFBFBD> STM32H750<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* <EFBFBD><EFBFBD>̳ :http://www.firebbs.cn
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* <EFBFBD>Ա<EFBFBD> :http://firestm32.taobao.com
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*
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******************************************************************
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*/
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#include "stm32h7xx.h"
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#include "main.h"
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#include "./usart/bsp_debug_usart.h"
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#include "./adc/bsp_adc.h"
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#include "./delay/core_delay.h"
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extern uint16_t ADC_ConvertedValue[4];
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float ADC_vol[4];
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//<2F><EFBFBD><F2B5A5B5><EFBFBD>ʱ<EFBFBD><CAB1><EFBFBD><EFBFBD>
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static void Delay(__IO uint32_t nCount)
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{
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for(; nCount != 0; nCount--);
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}
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/**
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* @brief <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* @param <EFBFBD><EFBFBD>
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* @retval <EFBFBD><EFBFBD>
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*/
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int main(void)
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{
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/* ϵͳʱ<CDB3>ӳ<EFBFBD>ʼ<EFBFBD><CABC><EFBFBD><EFBFBD>480MHz */
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SystemClock_Config();
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/* Ĭ<>ϲ<EFBFBD><CFB2><EFBFBD><EFBFBD><EFBFBD> MPU<50><55><EFBFBD><EFBFBD><EFBFBD><EFBFBD>Ҫ<EFBFBD><D2AA><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ܣ<EFBFBD><DCA3><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD> MPU <20><><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>
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DMA ʱ<EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD> Cache <EFBFBD><EFBFBD> <EFBFBD>ڴ<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>һ<EFBFBD><EFBFBD><EFBFBD>Ե<EFBFBD><EFBFBD><EFBFBD><EFBFBD>⣬
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<EFBFBD><EFBFBD><EFBFBD><EFBFBD>ע<EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ο<EFBFBD><EFBFBD><EFBFBD><EFBFBD>̵̳<EFBFBD> MPU <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>½<EFBFBD> */
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// Board_MPU_Config(0, MPU_Normal_WT, 0xD0000000, MPU_32MB);
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// Board_MPU_Config(1, MPU_Normal_WT, 0x24000000, MPU_512KB);
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SCB_EnableICache(); // ʹ<><CAB9>ָ<EFBFBD><D6B8> Cache
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// SCB_EnableDCache(); // ʹ<><CAB9><EFBFBD><EFBFBD><EFBFBD><EFBFBD> Cache
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/* <20><><EFBFBD>ô<EFBFBD><C3B4><EFBFBD>1Ϊ<31><CEAA>115200 8-N-1 */
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DEBUG_USART_Config();
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/* ADC<44><43>ʼ<EFBFBD><CABC><EFBFBD>ӳ<EFBFBD><D3B3><EFBFBD> */
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ADC_Init();
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while(1)
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{
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ADC_vol[0] =(float) ADC_ConvertedValue[0]/65536*(float)3.3;
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ADC_vol[1] =(float) ADC_ConvertedValue[1]/65536*(float)3.3;
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ADC_vol[2] =(float) ADC_ConvertedValue[2]/65536*(float)3.3;
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ADC_vol[3] =(float) ADC_ConvertedValue[3]/65536*(float)3.3;
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printf("\r\n CH1_PA4 value = %f V \r\n",ADC_vol[0]);
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printf("\r\n CH2_PA5 value = %f V \r\n",ADC_vol[1]);
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printf("\r\n CH3_PA6 value = %f V \r\n",ADC_vol[2]);
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printf("\r\n CH3_PA7 value = %f V \r\n",ADC_vol[3]);
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printf("\r\n\r\n");
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Delay(0xffffff);
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}
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}
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/**
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* @brief System Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD>
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* system Clock <EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>:
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* System Clock source = PLL (HSE)
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* SYSCLK(Hz) = 480000000 (CPU Clock)
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* HCLK(Hz) = 240000000 (AXI and AHBs Clock)
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* AHB Prescaler = 2
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* D1 APB3 Prescaler = 2 (APB3 Clock 120MHz)
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* D2 APB1 Prescaler = 2 (APB1 Clock 120MHz)
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* D2 APB2 Prescaler = 2 (APB2 Clock 120MHz)
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* D3 APB4 Prescaler = 2 (APB4 Clock 120MHz)
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* HSE Frequency(Hz) = 25000000
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* PLL_M = 5
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* PLL_N = 192
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* PLL_P = 2
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* PLL_Q = 4
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* PLL_R = 2
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* VDD(V) = 3.3
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* Flash Latency(WS) = 4
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* @param None
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* @retval None`
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*/
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void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {0};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
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/** <20><><EFBFBD>õ<EFBFBD>Դ<EFBFBD><D4B4><EFBFBD>ø<EFBFBD><C3B8><EFBFBD>
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*/
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HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
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/** <20><><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹ<EFBFBD><D1B9><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ѹ
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*/
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__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
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while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
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/* <20><><EFBFBD><EFBFBD>HSE<53><45><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʹ<EFBFBD><CAB9>HSE<53><45>ΪԴ<CEAA><D4B4><EFBFBD><EFBFBD>PLL */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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RCC_OscInitStruct.HSEState = RCC_HSE_ON;
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RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
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RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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RCC_OscInitStruct.PLL.PLLM = 5;
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RCC_OscInitStruct.PLL.PLLN = 192;
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RCC_OscInitStruct.PLL.PLLP = 2;
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RCC_OscInitStruct.PLL.PLLR = 2;
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RCC_OscInitStruct.PLL.PLLQ = 4;
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RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
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RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
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if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
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{
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while(1) { ; }
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}
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/* ѡ<><D1A1>PLL<4C><4C>Ϊϵͳʱ<CDB3><CAB1>Դ<EFBFBD><D4B4><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ʱ<EFBFBD>ӷ<EFBFBD>Ƶ<EFBFBD><C6B5> */
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RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | \
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RCC_CLOCKTYPE_HCLK | \
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RCC_CLOCKTYPE_D1PCLK1 | \
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RCC_CLOCKTYPE_PCLK1 | \
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RCC_CLOCKTYPE_PCLK2 | \
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RCC_CLOCKTYPE_D3PCLK1);
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
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RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
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RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
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if(HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
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{
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while(1) { ; }
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}
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}
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/****************************END OF FILE***************************/
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