58 lines
1.0 KiB
C
58 lines
1.0 KiB
C
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/*Ƭ<><C6AC><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ */
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#define PERIPH_BASE ((unsigned int)0x40000000)
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/*<2A><><EFBFBD><EFBFBD><DFBB><EFBFBD>ַ */
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#define D3_AHB1PERIPH_BASE (PERIPH_BASE + 0x18020000)
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/*GPIO<49><4F><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ*/
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#define GPIOB_BASE (D3_AHB1PERIPH_BASE + 0x0400)
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/* GPIOB<4F>Ĵ<EFBFBD><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,ǿ<><C7BF>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8> */
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#define GPIOB_MODER *(unsigned int*)(GPIOB_BASE+0x00)
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#define GPIOB_OTYPER *(unsigned int*)(GPIOB_BASE+0x04)
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#define GPIOB_OSPEEDR *(unsigned int*)(GPIOB_BASE+0x08)
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#define GPIOB_PUPDR *(unsigned int*)(GPIOB_BASE+0x0C)
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#define GPIOB_IDR *(unsigned int*)(GPIOB_BASE+0x10)
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#define GPIOB_ODR *(unsigned int*)(GPIOB_BASE+0x14)
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#define GPIOB_BSRR *(unsigned int*)(GPIOB_BASE+0x18)
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#define GPIOB_LCKR *(unsigned int*)(GPIOB_BASE+0x1C)
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#define GPIOB_AFRL *(unsigned int*)(GPIOB_BASE+0x20)
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#define GPIOB_AFRB *(unsigned int*)(GPIOB_BASE+0x24)
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/*RCC<43><43><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD><EFBFBD>ַ*/
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#define RCC_BASE (D3_AHB1PERIPH_BASE + 0x4400)
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/*RCC<43><43>AHB1ʱ<31><CAB1>ʹ<EFBFBD>ܼĴ<DCBC><C4B4><EFBFBD><EFBFBD><EFBFBD>ַ,ǿ<><C7BF>ת<EFBFBD><D7AA><EFBFBD><EFBFBD>ָ<EFBFBD><D6B8>*/
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#define RCC_AHB4ENR *(unsigned int*)(RCC_BASE+0xE0)
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